In U.S. Patent Application Publication No. 2005/0017290, a reverse-conducting semiconductor device 10, which also can be called a reverse-conducting insulated gate bipolar transistor (RC-IGBT), is described. The reverse-conducting semiconductor device 10 can include within one wafer an insulated gate bipolar transistor with a built-in freewheeling diode. As shown in FIG. 1, such a reverse-conducting semiconductor device 10 can include a base layer 1 formed as an n type base layer with a first main side and a second main side opposite the first main side. The first main side can form the emitter side 101 of the insulated gate bipolar transistor and the second main side can form the collector side 102 of the insulated gate bipolar transistor. A fourth p type layer 4 can be arranged on the emitter side 101. On the fourth layer 4, a fifth n type layer 5 with a higher doping than the base layer 1 can be arranged on the emitter side 101.
A sixth electrically insulating layer 6 can be arranged on the emitter side 101 and covers the fourth layer 4 and the base layer 1 and partially covers the fifth layer 5. An electrically conductive seventh layer 7 can be embedded in the sixth layer 6. Above the central part of the fourth layer 4 no fifth or sixth layer 5, 6 is arranged.
On this central part of the fourth layer 4, a first electrical contact 8 can be arranged, which covers the sixth layer 6. The first electrical contact 8 can be in direct electrical contact to the fifth layer 5 and the fourth layer 4 but can be electrically insulated from the seventh layer 7.
On the collector side 102, a buffer layer 13 can be arranged on the base layer 1. On the buffer layer 13, p type third layers 3 and n type second layers 2 can be arranged alternately in a plane. The second layers 2 can have a higher doping than the base layer 1. The second layers 2 can be arranged directly below the fourth layer 4 and the first electrical contact 8 if seen in orthographic projection.
A second electrical contact 9 can be arranged on the collector side 102 and covers the second and third layers 2, 3 and can be in direct electrical contact to them.
In such a reverse-conducting semiconductor device 1, a freewheeling diode can be formed between the second electrical contact 9, part of which forms a cathode electrode in the diode, the second layer 2, which forms a cathode region in the diode, the base layer 1, part of which forms a base layer in the diode, the fourth layer 4, part of which forms an anode region in the diode and the first electrical contact 8, which forms an anode in the diode.
An insulated gate bipolar transistor can be formed between the second electrical contact 9, part of which can form a collector electrode in the IGBT, the third layer 3, which can form a collector region in the IGBT, the base layer 1, part of which can form a base layer, the fourth layer 4, part of which can form a p-base region in the IGBT, the fifth layer 5, which can form a source region in the IGBT, and the first electrical contact 8, which can form an emitter electrode. During on-state of the IGBT a channel can be formed between the emitter electrode, the source region and the p-base region towards the n-base layer.
The layers of the RC-IGBT on the collector side 102 can be manufactured by implanting and diffusing p type ions. Afterwards a resist mask can be introduced, through which n type ions can be implanted and afterwards diffused. The implantation dose of the n type ions has to be so high that it compensates the p type region. The p and n type implantation steps can also be reversed.
DE 198 11 568 refers to an IGBT and a manufacturing method for such an IGBT with a built-in MOSFET, which includes on the backside, alternating p doped third layer and n doped second layer. These layers can be arranged in different, not overlapping planes. A p doped third layer can be formed and recesses can be formed in this layer by etching. N type ions can then be implanted over the whole backside surface and afterwards a heat treatment can be performed, by which the n and p type layers can be created. Therefore, the n type ions can be implanted also on those parts, on which p type ions can be arranged, which implies that the p dose has to be higher than the n dose.
In another manufacturing method described in DE 198 11 568, first recesses can be created, then the second main side can be irradiated in those parts without recess with electrons or protons and afterwards phosphorous ion implantation can be made over the whole surface. Then p doped ions can be implanted into that part without recesses, so that again the dose of the p type ions has to be higher than the n dose. A heat treatment can be performed for forming the n type second layer and p type third layer.
Due to overcompensation, limited selection for dose and depth of the latter manufactured layer of the second and third layer 2, 3 are only possible and the control for the p and n region injection efficiencies can be unsatisfactory. On-state snap-back effects, defined by the point at which the conduction voltage and current characteristics change from MOS operation mode to IGBT operation mode, can occur, which are undesirable for the device in the IGBT mode. FIG. 16 shows the output characteristics of the RC-IGBT current Ic to voltage Vce. The dashed line 14 shows the strong overshoot resulting from the snap-back effect, as it is typical for a known RC-IGBT during the change from MOS to IGBT operation mode. FIG. 17 shows the RC-IGBT current waveform in the diode mode during reverse recovery of the device. A known RC-IGBT shows a snappy behaviour of the device during reverse recovery (dotted line 17). The snappy behaviour can also be present during turn-off for the IGBT as well as for the diode reverse recovery (FIG. 18).